1. Field of the Invention
The present invention relates generally to flat panel displays (FPDs), and more specifically to field emission displays (FEDs). Even more specifically, the present invention relates to the structural design of field emission displays (FEDs).
2. Discussion of the Related Art
A field emission display (FED) is a low power, flat cathode ray tube type display that uses a matrix-addressed cold cathode to produce light from a screen coated with phosphor materials. FIG. 1 is a side cut-away view of a conventional FED. The FED 100 includes a cathode plate 102 and an anode plate 104, which opposes the cathode plate 102. The cathode plate 102 includes a cathode substrate 106, a first dielectric layer 108 disposed on the cathode substrate 106 and several emitter wells 110. Within each emitter well 110 is an electron emitter 112. Thus, the electron emitters are formed as conical electron emitters, the shape of which aids in the removal of electrons from the tips of the electron emitters 112. Each electron emitter 112 is generally referred to as a cathode sub-pixel. The cathode plate 102 also includes a gate electrode 114 integral with the cathode substrate 106 and disposed on the first dielectric layer 108 and circumscribing each emitter well 110. In order to precisely align the gate electrode 114 with the electron emitters 112, the emitter wells 110 are formed by cutting them out of the first dielectric layer 108 and the gate electrode 114 as formed on the cathode substrate 106 and then placing the electron emitters 112 within the emitter wells 110. As such, the manufacture of the cathode plate 102 is difficult and expensive.
The anode plate 104 includes a transparent substrate 116 upon which is formed an anode 118. Various phosphors are formed on the anode 118 and oppose the respective electron emitters 112, for example, a red phosphor 120, a green phosphor 122 and a blue phosphor 124, each phosphor generally referred to as an anode sub-pixel.
The FED 100 operates by selectively applying a voltage potential between cathodes of the cathode substrate 106 and the gate electrode 114, which causes selective emission from electron emitters 112. The emitted electrons are accelerated toward and illuminate respective phosphors of the anode 118 by applying a proper potential to a portion of the anode 118 containing the selected phosphor. It is noted that one or more electron emitters may emit electrons at a single phosphor.
Additionally, in order to allow free flow of electrons from the cathode plate 102 to the phosphors and to prevent chemical contamination (e.g., oxidation of the electron emitters), the cathode plate 102 and the anode plate 104 are sealed within a vacuum. As such, depending upon the dimensions of the FED, e.g., structurally rigid spacers (not shown) are positioned between the cathode plate 102 and the anode plate 104 in order to withstand the vacuum pressure over the area of the FED device.
In another conventional FED design illustrated in FIG. 2, an FED 200 further includes a second dielectric layer 202 disposed upon the gate electrode 114 and a focusing electrode 204 disposed upon the second dielectric layer 202. In operation, a potential is also applied to the focusing electrode 204. This potential is selected to collimate the electron beam emitted from respective electron emitters 112. Thus, the focusing electrode 204 concentrates the electrons to better illuminate a single phosphor, i.e., the emitted electrons are focused. However, in order to reduce the spread of electrons, a separate focusing structure (i.e., focusing electrode 204) formed over the gate electrode 114 and that is integral to the cathode substrate 106 is required.
FIG. 3 illustrates a cut-away perspective view of the conventional FED 100 of FIG. 1. As shown, the gate electrode 114 and the first dielectric layer 108 form a grid in which the generally circular-shaped emitter wells 110 are formed. In fabrication, the first dielectric layer 108 and the gate electrode 114 are formed over the cathode substrate 106. The emitter wells 110 are formed by etching or cutting out the first dielectric layer 108 and the gate electrode 114. The conical-shaped electron emitters 112 are then deposited into the emitter well 110.
Advantageously, the conventional FED provides a relatively thin display device that can achieve CRT-like performance. However, the conventional FED is limited by the pixelation of the device. For example, since there are a fixed number of electron emitters 112 and phosphors aligned therewith, the resolution of the conventional FED is fixed. Furthermore, the manufacture of conventional FEDs has proven difficult and expensive. Additionally, while driving the conventional FED, i.e., applying the proper potential between the gate electrode and the electron emitters 112, cross-talk is a common problem.
The present invention advantageously addresses the needs above as well as other needs by providing methods of aligning components of an improved field emission display (FED) having a novel structural design.
In one embodiment, the invention can be characterized as a method of alignment of components of a field emission display comprising the steps of: attaching an first alignment barrier to a cathode substrate including electron emitters; positioning a gate frame against the first alignment barrier such that the gate frame is aligned with the cathode substrate; and sealing the gate frame in position against the first alignment barrier to the cathode substrate.
In another embodiment, the invention can be characterized as a method of alignment of components of a field emission display comprising the steps of: attaching an alignment barrier to a gate frame of a cathode substrate of the field emission display including electron emitters; positioning an anode plate against the alignment barrier such that the anode plate is aligned with the cathode substrate; and sealing the anode plate in position against the alignment barrier to the gate frame.
In a further embodiment, the invention may be characterized as a device for aligning components of a field emission display comprising a first alignment barrier attached to a first component of the field emission display, wherein the first alignment barrier includes a portion adapted to receive an exterior portion of a second component of the field emission display. The first component and the second component are sealed to each other with the second component positioned against the first alignment barrier.